ADTRAN Design Verification Test Engineer Salaries - Browse Average Salaries by Location
Browse ADTRAN Salaries by Job Title →Updated
What is the average salary of ADTRAN Design Verification Test Engineer?
ADTRAN Design Verification Test Engineers earn $77,000 annually, or $37 per hour, which is 11% higher than the national average for all Design Verification Test Engineers at $69,000 annually and 15% higher than the national salary average for all working Americans. The highest paid Design Verification Test Engineers work for Marvell Technology at $106,000 annually and the lowest paid Design Verification Test Engineers work for JDS Uniphase at $65,000 annually.
What is the salary for Design Verification Test Engineer at ADTRAN?
The salary for Design Verification Test Engineer at ADTRAN is $71,000 annually.
What company pays the highest salary for the Design Verification Test Engineer position?
Marvell Technology pays the highest salary for the Design Verification Test Engineer position at $106,000 annually.
What company pays the lowest salary for the Design Verification Test Engineer position?
JDS Uniphase pays the lowest salary for the Design Verification Test Engineer position at $65,000 annually.
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