UTC Aerospace Systems Systems Verification Engineer Salaries - Browse Average Salaries by Location
Browse UTC Aerospace Systems Salaries by Job Title →Updated
What is the average salary of UTC Aerospace Systems Systems Verification Engineer?
UTC Aerospace Systems Systems Verification Engineers earn $70,000 annually, or $34 per hour, which is 17% lower than the national average for all Systems Verification Engineers at $83,000 annually and 6% higher than the national salary average for all working Americans. The highest paid Systems Verification Engineers work for Avaya at $104,000 annually and the lowest paid Systems Verification Engineers work for Sony Mobile at $67,000 annually.
$70K Vergennes, VT Systems Verification Engineer Average Salary at UTC Aerospace Systems ·
What is the salary for Systems Verification Engineer at UTC Aerospace Systems?
The salary for Systems Verification Engineer at UTC Aerospace Systems is $70,000 annually.
What company pays the highest salary for the Systems Verification Engineer position?
Avaya pays the highest salary for the Systems Verification Engineer position at $104,000 annually.
What company pays the lowest salary for the Systems Verification Engineer position?
Sony Mobile pays the lowest salary for the Systems Verification Engineer position at $67,000 annually.
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