The following duties are essential to the successful and satisfactory performance of this job. Other duties may be assigned.
* Proactively collaborate...
* Collaborate with senior engineers to define and implement UVM-based verification plans for FPGA and ASIC designs.
* Develop and maintain SystemVerilog...
We’re looking for a senior software engineer with experience developing in early-stage or high-growth environments to join our team. As a foundational...