821 ASIC Engineer Jobs Nationwide

*Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team...

* Design and implement RTL solutions using Verilog or VHDL for ARM-based SoC architectures, focusing on integration and optimization of WiFi...

* Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures...

NOTE: Due to nature of the project, U.S. Citizenship is required. Resource will work onsite from day one at Cedar Rapids, IA (5 days onsite) Experience...

* Work with AMD’s architecture specialists to improve future products * Apply a data minded approach to target optimization efforts * Stay informed...

* As a FPGA/ASIC Design Verification Engineer, you will own functional verification for a custom controller. * You will develop functional verification...

* Conduct testing of ASIC in the lab utilizing the FPGA which is part of the test set up. Use signal generators, oscilloscopes and network analyzer...

Are you ready to join Connecticut Innovation's vibrant community of innovators? Connecticut Innovations ("CI") is Connecticut's strategic...

* Developing block and SoC timing constraints, full chip STA setup and signoff of multi-corner multi-voltage designs. * Owning timing flow and...

Socionext Inc. (SNI) is an innovative enterprise that designs, develops, and delivers System-on-Chip products to customers worldwide. The...

Responsibilities * Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible with RTL and...

For HAPS or EMULATION – Should have Model build and DESIGN along with integration and development. * Able to Map multi-million gate SoC designs onto...

For HAPS or EMULATION – Should have Model build and DESIGN along with integration and development. * Able to Map multi-million gate SoC designs onto...

For HAPS or EMULATION – Should have Model build and DESIGN along with integration and development. * Able to Map multi-million gate SoC designs onto...

For HAPS or EMULATION – Should have Model build and DESIGN along with integration and development. * Able to Map multi-million gate SoC designs onto...

For HAPS or EMULATION – Should have Model build and DESIGN along with integration and development. * Able to Map multi-million gate SoC designs onto...

For HAPS or EMULATION – Should have Model build and DESIGN along with integration and development. * Able to Map multi-million gate SoC designs onto...

* Develop ASIC testbenches using UVM to verify microchip design functionality. * Implement microarchitecture and RTL specifications in System...

* Develop ASIC testbenches using UVM to verify microchip design functionality. * Implement microarchitecture and RTL specifications in System...

* Develop ASIC testbenches using UVM to verify microchip design functionality. * Implement microarchitecture and RTL specifications in System...