Honeywell Senior ASIC and FPGA Design Engineer Salaries - Browse Average Salaries by Location

-$3K (2%) less than national average Senior ASIC and FPGA Design Engineer salary ($104K)

+$36K (43%) more than average Honeywell salary ($65K)

What is the salary for Senior ASIC and FPGA Design Engineer at Honeywell?

The salary for Senior ASIC and FPGA Design Engineer at Honeywell is $101,000 annually.

pays the highest salary for the Senior ASIC and FPGA Design Engineer position at $0 annually.

pays the lowest salary for the Senior ASIC and FPGA Design Engineer position at $0 annually.

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