Company Menu

ServerEngines Design and Verification Engineer Salaries - Browse Average Salaries by Location

Browse ServerEngines Salaries by Job Title →

Updated

What is the average salary of ServerEngines Design and Verification Engineer?

ServerEngines Design and Verification Engineers earn $85,000 annually, or $41 per hour, which is 2% higher than the national average for all Design and Verification Engineers at $83,000 annually and 25% higher than the national salary average for ​all working Americans. The highest paid Design and Verification Engineers work for Cisco Systems at $101,000 annually and the lowest paid Design and Verification Engineers work for Atria Logic at $68,000 annually.

$85K ServerEngines Design and Verification Engineer without location (1 salary)

+$2K (2%) more than national average Design and Verification Engineer salary ($83K)
+$5K (6%) more than average ServerEngines salary ($80K)

What is the salary for Design and Verification Engineer at ServerEngines?

The salary for Design and Verification Engineer at ServerEngines is $85,000 annually.

What company pays the highest salary for the Design and Verification Engineer position?

Cisco Systems pays the highest salary for the Design and Verification Engineer position at $101,000 annually.

What company pays the lowest salary for the Design and Verification Engineer position?

Atria Logic pays the lowest salary for the Design and Verification Engineer position at $68,000 annually.

We noticed that your web browser is outdated!

Update your browser to have a more positive job search experience.

Upgrade My Browser

×